Project

Changelog

All notable changes to sass2mlir are documented here. The format follows Keep a Changelog: newest release first, each with Added / Changed / Fixed / Removed sections as needed. Every release is tagged in the repository; versions also carry a codename in CMakeLists.txt (SASS2MLIR_VERSION_NAME).

[Unreleased]

Added

  • -DSASS_MLIR=OFF build option: compiles against the internal simplified-MLIR IR, dropping the LLVM/MLIR dependency entirely — for edge and minimal builds.
  • -DSASS_ACTIVE_SMS=...: compile decode tables for exactly the listed SM architectures.

Changed

  • The single-architecture -DSASS_SM*_ONLY=ON flags are replaced by -DSASS_ACTIVE_SMS.

[0.10.0] — 2026-07-11

The first documented release: the full lift → analyze → transform → patch loop, regression-gated at corpus scale.

Added

  • Byte-exact lift/lower for NVIDIA SASS across 22 SM architectures (Volta sm_70 through Blackwell sm_121a), held at zero decode mismatches over the local corpus by continuous regression.
  • The sass MLIR dialect: per-mnemonic ops generated from probe-derived opcode tables, structured lossless operands, the authoritative $raw encoding on every op, and the generic sass.inst carrier for unrecognized (hidden/undocumented) instructions.
  • Analyses over recovered SSA: CFG recovery (cross-checked against nvdisasm -bbcfg), Braun-style SSA with block-argument φ-nodes, def-use with reaching definitions, per-block liveness, and conservative uniformity analysis.
  • Register allocation: Chaitin-Briggs over the recovered SSA, extended to the uniform datapath (UR/UP), with regalloc --pinned (byte-identity oracle) and --free (contributor-set-equivalence-checked) modes.
  • The apply engine: SASS→SASS transforms as .so pass plugins with a small stable ABI, per-architecture/per-function targeting via pass.toml, report-by-default safety, and in-place cubin patching (.text + .nv.info) that leaves the kernel ABI untouched.
  • intercept: live-process kernel capture (cubin + .code + .mlir + per-launch run.csv) and, with --apply, rewrite-at-load — no manual LD_PRELOAD.
  • The six-pass FlashAttention pipeline for Hopper (spill-removal, scalar-to-uniform, warp-specialization, hmma-to-hgmma, ldsm-to-tma, ffma-deftz), with H100 benchmark results on the overview page.
  • Single-architecture builds (-DSASS_SM*_ONLY=ON) for low-RAM edge targets such as Jetson Orin.

Known limitations

  • The structural FlashAttention passes (spill-removal, warp-specialization, hmma-to-hgmma, ldsm-to-tma) run report-only while being driven to full application.
  • The Jetson (sm_87) optimization case study is in progress; no benchmark numbers yet.
  • The roadmap passes (kernel blacklisting, natural-yield, instruction scheduling) are framework capabilities, not shipped results.